Commit 5626e165 authored by Henri Verbeet's avatar Henri Verbeet Committed by Alexandre Julliard

wined3d: Introduce a structure for shader register indices.

parent a92d7a12
......@@ -448,11 +448,12 @@ static void shader_parse_src_param(DWORD param, const struct wined3d_shader_src_
src->reg.type = ((param & WINED3DSP_REGTYPE_MASK) >> WINED3DSP_REGTYPE_SHIFT)
| ((param & WINED3DSP_REGTYPE_MASK2) >> WINED3DSP_REGTYPE_SHIFT2);
src->reg.data_type = WINED3D_DATA_FLOAT;
src->reg.idx = param & WINED3DSP_REGNUM_MASK;
src->reg.array_idx = ~0U;
src->reg.idx[0].offset = param & WINED3DSP_REGNUM_MASK;
src->reg.idx[0].rel_addr = rel_addr;
src->reg.idx[1].offset = ~0U;
src->reg.idx[1].rel_addr = NULL;
src->swizzle = (param & WINED3DSP_SWIZZLE_MASK) >> WINED3DSP_SWIZZLE_SHIFT;
src->modifiers = (param & WINED3DSP_SRCMOD_MASK) >> WINED3DSP_SRCMOD_SHIFT;
src->reg.rel_addr = rel_addr;
}
static void shader_parse_dst_param(DWORD param, const struct wined3d_shader_src_param *rel_addr,
......@@ -461,12 +462,13 @@ static void shader_parse_dst_param(DWORD param, const struct wined3d_shader_src_
dst->reg.type = ((param & WINED3DSP_REGTYPE_MASK) >> WINED3DSP_REGTYPE_SHIFT)
| ((param & WINED3DSP_REGTYPE_MASK2) >> WINED3DSP_REGTYPE_SHIFT2);
dst->reg.data_type = WINED3D_DATA_FLOAT;
dst->reg.idx = param & WINED3DSP_REGNUM_MASK;
dst->reg.array_idx = ~0U;
dst->reg.idx[0].offset = param & WINED3DSP_REGNUM_MASK;
dst->reg.idx[0].rel_addr = rel_addr;
dst->reg.idx[1].offset = ~0U;
dst->reg.idx[1].rel_addr = NULL;
dst->write_mask = (param & WINED3D_SM1_WRITEMASK_MASK) >> WINED3D_SM1_WRITEMASK_SHIFT;
dst->modifiers = (param & WINED3DSP_DSTMOD_MASK) >> WINED3DSP_DSTMOD_SHIFT;
dst->shift = (param & WINED3DSP_DSTSHIFT_MASK) >> WINED3DSP_DSTSHIFT_SHIFT;
dst->reg.rel_addr = rel_addr;
}
/* Read the parameters of an unrecognized opcode from the input stream
......@@ -628,9 +630,10 @@ static void shader_sm1_read_immconst(const DWORD **ptr, struct wined3d_shader_sr
UINT count = type == WINED3D_IMMCONST_VEC4 ? 4 : 1;
src_param->reg.type = WINED3DSPR_IMMCONST;
src_param->reg.data_type = data_type;
src_param->reg.idx = ~0U;
src_param->reg.array_idx = ~0U;
src_param->reg.rel_addr = NULL;
src_param->reg.idx[0].offset = ~0U;
src_param->reg.idx[0].rel_addr = NULL;
src_param->reg.idx[1].offset = ~0U;
src_param->reg.idx[1].rel_addr = NULL;
src_param->reg.immconst_type = type;
memcpy(src_param->reg.immconst_data, *ptr, count * sizeof(DWORD));
src_param->swizzle = WINED3DSP_NOSWIZZLE;
......
......@@ -195,12 +195,6 @@ struct sysval_map
UINT register_idx;
};
struct wined3d_sm4_reg_idx
{
struct wined3d_shader_src_param *rel_addr;
unsigned int offset;
};
/*
* F -> WINED3D_DATA_FLOAT
* I -> WINED3D_DATA_INT
......@@ -339,7 +333,7 @@ static void map_sysval(enum wined3d_sysval_semantic sysval, struct wined3d_shade
if (sysval == sysval_map[i].sysval)
{
reg->type = sysval_map[i].register_type;
reg->idx = sysval_map[i].register_idx;
reg->idx[0].offset = sysval_map[i].register_idx;
}
}
}
......@@ -362,7 +356,7 @@ static void map_register(const struct wined3d_sm4_data *priv, struct wined3d_sha
for (i = 0; i < s->element_count; ++i)
{
if (s->elements[i].register_idx == reg->idx)
if (s->elements[i].register_idx == reg->idx[0].offset)
{
map_sysval(s->elements[i].sysval_semantic, reg);
break;
......@@ -484,7 +478,7 @@ static void shader_sm4_read_header(void *data, const DWORD **ptr, struct wined3d
}
static BOOL shader_sm4_read_reg_idx(struct wined3d_sm4_data *priv, const DWORD **ptr,
DWORD addressing, struct wined3d_sm4_reg_idx *reg_idx)
DWORD addressing, struct wined3d_shader_register_index *reg_idx)
{
if (addressing & WINED3D_SM4_ADDRESSING_RELATIVE)
{
......@@ -516,7 +510,6 @@ static BOOL shader_sm4_read_param(struct wined3d_sm4_data *priv, const DWORD **p
enum wined3d_shader_src_modifier *modifier)
{
enum wined3d_sm4_register_type register_type;
struct wined3d_sm4_reg_idx reg_idx;
DWORD token = *(*ptr)++;
DWORD order;
......@@ -563,31 +556,27 @@ static BOOL shader_sm4_read_param(struct wined3d_sm4_data *priv, const DWORD **p
order = (token & WINED3D_SM4_REGISTER_ORDER_MASK) >> WINED3D_SM4_REGISTER_ORDER_SHIFT;
if (order < 1)
param->idx = ~0U;
param->idx[0].offset = ~0U;
else
{
DWORD addressing = (token & WINED3D_SM4_ADDRESSING_MASK0) >> WINED3D_SM4_ADDRESSING_SHIFT0;
if (!(shader_sm4_read_reg_idx(priv, ptr, addressing, &reg_idx)))
if (!(shader_sm4_read_reg_idx(priv, ptr, addressing, &param->idx[0])))
{
ERR("Failed to read register index.\n");
return FALSE;
}
param->rel_addr = reg_idx.rel_addr;
param->idx = reg_idx.offset;
}
if (order < 2)
param->array_idx = ~0U;
param->idx[1].offset = ~0U;
else
{
DWORD addressing = (token & WINED3D_SM4_ADDRESSING_MASK1) >> WINED3D_SM4_ADDRESSING_SHIFT1;
if (!(shader_sm4_read_reg_idx(priv, ptr, addressing, &reg_idx)))
if (!(shader_sm4_read_reg_idx(priv, ptr, addressing, &param->idx[1])))
{
ERR("Failed to read register index.\n");
return FALSE;
}
param->array_rel_addr = reg_idx.rel_addr;
param->array_idx = reg_idx.offset;
}
if (order > 2)
......
......@@ -625,14 +625,17 @@ struct wined3d_shader_context
void *backend_data;
};
struct wined3d_shader_register_index
{
const struct wined3d_shader_src_param *rel_addr;
unsigned int offset;
};
struct wined3d_shader_register
{
enum wined3d_shader_register_type type;
enum wined3d_data_type data_type;
UINT idx;
UINT array_idx;
const struct wined3d_shader_src_param *rel_addr;
const struct wined3d_shader_src_param *array_rel_addr;
struct wined3d_shader_register_index idx[2];
enum wined3d_immconst_type immconst_type;
DWORD immconst_data[4];
};
......@@ -2667,7 +2670,8 @@ static inline BOOL shader_is_scalar(const struct wined3d_shader_register *reg)
{
case WINED3DSPR_RASTOUT:
/* oFog & oPts */
if (reg->idx) return TRUE;
if (reg->idx[0].offset)
return TRUE;
/* oPos */
return FALSE;
......@@ -2678,7 +2682,7 @@ static inline BOOL shader_is_scalar(const struct wined3d_shader_register *reg)
return TRUE;
case WINED3DSPR_MISCTYPE:
switch(reg->idx)
switch (reg->idx[0].offset)
{
case 0: /* vPos */
return FALSE;
......
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