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Commit ce8640cb authored by André Hentschel's avatar André Hentschel Committed by Alexandre Julliard
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dbghelp: Add ARM64 support.

parent 1b440629
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Showing with 201 additions and 2 deletions
dlls/dbghelp/Makefile.in
View file @ ce8640cb
......@@ -7,6 +7,7 @@ DELAYIMPORTS = version
C_SRCS = \
coff.c \
cpu_arm.c \
cpu_arm64.c \
cpu_i386.c \
cpu_ppc.c \
cpu_sparc.c \
......
dlls/dbghelp/cpu_arm64.c 0 → 100644
View file @ ce8640cb
/*
* File cpu_arm64.c
*
* Copyright (C) 2009 Eric Pouech
* Copyright (C) 2010-2013 André Hentschel
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
*/
#include <assert.h>
#include "ntstatus.h"
#define WIN32_NO_STATUS
#include "dbghelp_private.h"
#include "winternl.h"
#include "wine/debug.h"
WINE_DEFAULT_DEBUG_CHANNEL(dbghelp);
static unsigned arm64_get_addr(HANDLE hThread, const CONTEXT* ctx,
enum cpu_addr ca, ADDRESS64* addr)
{
addr->Mode = AddrModeFlat;
addr->Segment = 0; /* don't need segment */
switch (ca)
{
#ifdef __aarch64__
case cpu_addr_pc: addr->Offset = ctx->Pc; return TRUE;
case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE;
case cpu_addr_frame: addr->Offset = ctx->X29; return TRUE;
#endif
default: addr->Mode = -1;
return FALSE;
}
}
static BOOL arm64_stack_walk(struct cpu_stack_walk* csw, LPSTACKFRAME64 frame, CONTEXT* context)
{
FIXME("not done for ARM64\n");
return FALSE;
}
static unsigned arm64_map_dwarf_register(unsigned regno)
{
if (regno <= 30) return CV_ARM64_X0 + regno;
if (regno == 31) return CV_ARM64_SP;
FIXME("Don't know how to map register %d\n", regno);
return CV_ARM64_NOREG;
}
static void* arm64_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* size)
{
#ifdef __aarch64__
switch (regno)
{
case CV_ARM64_X0 + 0: *size = sizeof(ctx->X0); return &ctx->X0;
case CV_ARM64_X0 + 1: *size = sizeof(ctx->X1); return &ctx->X1;
case CV_ARM64_X0 + 2: *size = sizeof(ctx->X2); return &ctx->X2;
case CV_ARM64_X0 + 3: *size = sizeof(ctx->X3); return &ctx->X3;
case CV_ARM64_X0 + 4: *size = sizeof(ctx->X4); return &ctx->X4;
case CV_ARM64_X0 + 5: *size = sizeof(ctx->X5); return &ctx->X5;
case CV_ARM64_X0 + 6: *size = sizeof(ctx->X6); return &ctx->X6;
case CV_ARM64_X0 + 7: *size = sizeof(ctx->X7); return &ctx->X7;
case CV_ARM64_X0 + 8: *size = sizeof(ctx->X8); return &ctx->X8;
case CV_ARM64_X0 + 9: *size = sizeof(ctx->X9); return &ctx->X9;
case CV_ARM64_X0 + 10: *size = sizeof(ctx->X10); return &ctx->X10;
case CV_ARM64_X0 + 11: *size = sizeof(ctx->X11); return &ctx->X11;
case CV_ARM64_X0 + 12: *size = sizeof(ctx->X12); return &ctx->X12;
case CV_ARM64_X0 + 13: *size = sizeof(ctx->X13); return &ctx->X13;
case CV_ARM64_X0 + 14: *size = sizeof(ctx->X14); return &ctx->X14;
case CV_ARM64_X0 + 15: *size = sizeof(ctx->X15); return &ctx->X15;
case CV_ARM64_X0 + 16: *size = sizeof(ctx->X16); return &ctx->X16;
case CV_ARM64_X0 + 17: *size = sizeof(ctx->X17); return &ctx->X17;
case CV_ARM64_X0 + 18: *size = sizeof(ctx->X18); return &ctx->X18;
case CV_ARM64_X0 + 19: *size = sizeof(ctx->X19); return &ctx->X19;
case CV_ARM64_X0 + 20: *size = sizeof(ctx->X20); return &ctx->X20;
case CV_ARM64_X0 + 21: *size = sizeof(ctx->X21); return &ctx->X21;
case CV_ARM64_X0 + 22: *size = sizeof(ctx->X22); return &ctx->X22;
case CV_ARM64_X0 + 23: *size = sizeof(ctx->X23); return &ctx->X23;
case CV_ARM64_X0 + 24: *size = sizeof(ctx->X24); return &ctx->X24;
case CV_ARM64_X0 + 25: *size = sizeof(ctx->X25); return &ctx->X25;
case CV_ARM64_X0 + 26: *size = sizeof(ctx->X26); return &ctx->X26;
case CV_ARM64_X0 + 27: *size = sizeof(ctx->X27); return &ctx->X27;
case CV_ARM64_X0 + 28: *size = sizeof(ctx->X28); return &ctx->X28;
case CV_ARM64_X0 + 29: *size = sizeof(ctx->X29); return &ctx->X29;
case CV_ARM64_X0 + 30: *size = sizeof(ctx->X30); return &ctx->X30;
case CV_ARM64_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
case CV_ARM64_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
case CV_ARM64_PSTATE: *size = sizeof(ctx->PState); return &ctx->PState;
}
#endif
FIXME("Unknown register %x\n", regno);
return NULL;
}
static const char* arm64_fetch_regname(unsigned regno)
{
switch (regno)
{
case CV_ARM64_X0 + 0: return "x0";
case CV_ARM64_X0 + 1: return "x1";
case CV_ARM64_X0 + 2: return "x2";
case CV_ARM64_X0 + 3: return "x3";
case CV_ARM64_X0 + 4: return "x4";
case CV_ARM64_X0 + 5: return "x5";
case CV_ARM64_X0 + 6: return "x6";
case CV_ARM64_X0 + 7: return "x7";
case CV_ARM64_X0 + 8: return "x8";
case CV_ARM64_X0 + 9: return "x9";
case CV_ARM64_X0 + 10: return "x10";
case CV_ARM64_X0 + 11: return "x11";
case CV_ARM64_X0 + 12: return "x12";
case CV_ARM64_X0 + 13: return "x13";
case CV_ARM64_X0 + 14: return "x14";
case CV_ARM64_X0 + 15: return "x15";
case CV_ARM64_X0 + 16: return "x16";
case CV_ARM64_X0 + 17: return "x17";
case CV_ARM64_X0 + 18: return "x18";
case CV_ARM64_X0 + 19: return "x19";
case CV_ARM64_X0 + 20: return "x20";
case CV_ARM64_X0 + 21: return "x21";
case CV_ARM64_X0 + 22: return "x22";
case CV_ARM64_X0 + 23: return "x23";
case CV_ARM64_X0 + 24: return "x24";
case CV_ARM64_X0 + 25: return "x25";
case CV_ARM64_X0 + 26: return "x26";
case CV_ARM64_X0 + 27: return "x27";
case CV_ARM64_X0 + 28: return "x28";
case CV_ARM64_X0 + 29: return "x29";
case CV_ARM64_X0 + 30: return "x30";
case CV_ARM64_SP: return "sp";
case CV_ARM64_PC: return "pc";
case CV_ARM64_PSTATE: return "cpsr";
}
FIXME("Unknown register %x\n", regno);
return NULL;
}
static BOOL arm64_fetch_minidump_thread(struct dump_context* dc, unsigned index, unsigned flags, const CONTEXT* ctx)
{
if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow))
{
/* FIXME: crop values across module boundaries, */
#ifdef __aarch64__
ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80;
minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0);
#endif
}
return TRUE;
}
static BOOL arm64_fetch_minidump_module(struct dump_context* dc, unsigned index, unsigned flags)
{
/* FIXME: actually, we should probably take care of FPO data, unless it's stored in
* function table minidump stream
*/
return FALSE;
}
DECLSPEC_HIDDEN struct cpu cpu_arm64 = {
IMAGE_FILE_MACHINE_ARM64,
8,
CV_ARM64_X0 + 29,
arm64_get_addr,
arm64_stack_walk,
NULL,
arm64_map_dwarf_register,
arm64_fetch_context_reg,
arm64_fetch_regname,
arm64_fetch_minidump_thread,
arm64_fetch_minidump_module,
};
dlls/dbghelp/dbghelp.c
View file @ ce8640cb
......@@ -151,9 +151,9 @@ const char* wine_dbgstr_addr(const ADDRESS64* addr)
}
}
extern struct cpu cpu_i386, cpu_x86_64, cpu_ppc, cpu_sparc, cpu_arm;
extern struct cpu cpu_i386, cpu_x86_64, cpu_ppc, cpu_sparc, cpu_arm, cpu_arm64;
static struct cpu* dbghelp_cpus[] = {&cpu_i386, &cpu_x86_64, &cpu_ppc, &cpu_sparc, &cpu_arm, NULL};
static struct cpu* dbghelp_cpus[] = {&cpu_i386, &cpu_x86_64, &cpu_ppc, &cpu_sparc, &cpu_arm, &cpu_arm64, NULL};
struct cpu* dbghelp_current_cpu =
#if defined(__i386__)
&cpu_i386
......@@ -165,6 +165,8 @@ struct cpu* dbghelp_current_cpu =
&cpu_sparc
#elif defined(__arm__)
&cpu_arm
#elif defined(__aarch64__)
&cpu_arm64
#else
#error define support for your CPU
#endif
......
include/cvconst.h
View file @ ce8640cb
......@@ -677,6 +677,13 @@ enum CV_HREG_e
CV_SPARC_Y = 45,
CV_SPARC_WIM = 46,
CV_SPARC_TBR = 47,
/* Wine extension */
CV_ARM64_NOREG = CV_REG_NONE,
CV_ARM64_X0 = 10, /* this includes X0 to X30 */
CV_ARM64_SP = 41,
CV_ARM64_PC = 42,
CV_ARM64_PSTATE = 43,
};
typedef enum
......
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