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wine
wine-cw
Commits
417e926a
Commit
417e926a
authored
Apr 19, 2011
by
André Hentschel
Committed by
Alexandre Julliard
Apr 20, 2011
Browse files
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Plain Diff
server: Remove Alpha support.
parent
6f9d1840
Hide whitespace changes
Inline
Side-by-side
Showing
4 changed files
with
3 additions
and
68 deletions
+3
-68
server_protocol.h
include/wine/server_protocol.h
+2
-7
protocol.def
server/protocol.def
+1
-6
thread.c
server/thread.c
+0
-6
trace.c
server/trace.c
+0
-49
No files found.
include/wine/server_protocol.h
View file @
417e926a
...
@@ -129,7 +129,7 @@ typedef union
...
@@ -129,7 +129,7 @@ typedef union
enum
cpu_type
enum
cpu_type
{
{
CPU_x86
,
CPU_x86_64
,
CPU_
ALPHA
,
CPU_
POWERPC
,
CPU_ARM
,
CPU_SPARC
CPU_x86
,
CPU_x86_64
,
CPU_POWERPC
,
CPU_ARM
,
CPU_SPARC
};
};
typedef
int
cpu_type_t
;
typedef
int
cpu_type_t
;
...
@@ -143,8 +143,6 @@ typedef struct
...
@@ -143,8 +143,6 @@ typedef struct
struct
{
unsigned
int
eip
,
ebp
,
esp
,
eflags
,
cs
,
ss
;
}
i386_regs
;
struct
{
unsigned
int
eip
,
ebp
,
esp
,
eflags
,
cs
,
ss
;
}
i386_regs
;
struct
{
unsigned
__int64
rip
,
rbp
,
rsp
;
struct
{
unsigned
__int64
rip
,
rbp
,
rsp
;
unsigned
int
cs
,
ss
,
flags
,
__pad
;
}
x86_64_regs
;
unsigned
int
cs
,
ss
,
flags
,
__pad
;
}
x86_64_regs
;
struct
{
unsigned
__int64
fir
;
unsigned
int
psr
,
__pad
;
}
alpha_regs
;
struct
{
unsigned
int
iar
,
msr
,
ctr
,
lr
,
dar
,
dsisr
,
trap
,
__pad
;
}
powerpc_regs
;
struct
{
unsigned
int
iar
,
msr
,
ctr
,
lr
,
dar
,
dsisr
,
trap
,
__pad
;
}
powerpc_regs
;
struct
{
unsigned
int
sp
,
lr
,
pc
,
cpsr
;
}
arm_regs
;
struct
{
unsigned
int
sp
,
lr
,
pc
,
cpsr
;
}
arm_regs
;
struct
{
unsigned
int
psr
,
pc
,
npc
,
y
,
wim
,
tbr
;
}
sparc_regs
;
struct
{
unsigned
int
psr
,
pc
,
npc
,
y
,
wim
,
tbr
;
}
sparc_regs
;
...
@@ -154,8 +152,6 @@ typedef struct
...
@@ -154,8 +152,6 @@ typedef struct
struct
{
unsigned
int
eax
,
ebx
,
ecx
,
edx
,
esi
,
edi
;
}
i386_regs
;
struct
{
unsigned
int
eax
,
ebx
,
ecx
,
edx
,
esi
,
edi
;
}
i386_regs
;
struct
{
unsigned
__int64
rax
,
rbx
,
rcx
,
rdx
,
rsi
,
rdi
,
struct
{
unsigned
__int64
rax
,
rbx
,
rcx
,
rdx
,
rsi
,
rdi
,
r8
,
r9
,
r10
,
r11
,
r12
,
r13
,
r14
,
r15
;
}
x86_64_regs
;
r8
,
r9
,
r10
,
r11
,
r12
,
r13
,
r14
,
r15
;
}
x86_64_regs
;
struct
{
unsigned
__int64
v0
,
t0
,
t1
,
t2
,
t3
,
t4
,
t5
,
t6
,
t7
,
t8
,
t9
,
t10
,
t11
,
t12
,
s0
,
s1
,
s2
,
s3
,
s4
,
s5
,
s6
,
a0
,
a1
,
a2
,
a3
,
a4
,
a5
,
at
;
}
alpha_regs
;
struct
{
unsigned
int
gpr
[
32
],
cr
,
xer
;
}
powerpc_regs
;
struct
{
unsigned
int
gpr
[
32
],
cr
,
xer
;
}
powerpc_regs
;
struct
{
unsigned
int
r
[
13
];
}
arm_regs
;
struct
{
unsigned
int
r
[
13
];
}
arm_regs
;
struct
{
unsigned
int
g
[
8
],
o
[
8
],
l
[
8
],
i
[
8
];
}
sparc_regs
;
struct
{
unsigned
int
g
[
8
],
o
[
8
],
l
[
8
],
i
[
8
];
}
sparc_regs
;
...
@@ -170,7 +166,6 @@ typedef struct
...
@@ -170,7 +166,6 @@ typedef struct
struct
{
unsigned
int
ctrl
,
status
,
tag
,
err_off
,
err_sel
,
data_off
,
data_sel
,
cr0npx
;
struct
{
unsigned
int
ctrl
,
status
,
tag
,
err_off
,
err_sel
,
data_off
,
data_sel
,
cr0npx
;
unsigned
char
regs
[
80
];
}
i386_regs
;
unsigned
char
regs
[
80
];
}
i386_regs
;
struct
{
struct
{
unsigned
__int64
low
,
high
;
}
fpregs
[
32
];
}
x86_64_regs
;
struct
{
struct
{
unsigned
__int64
low
,
high
;
}
fpregs
[
32
];
}
x86_64_regs
;
struct
{
unsigned
__int64
f
[
32
],
fpcr
,
softfpcr
;
}
alpha_regs
;
struct
{
double
fpr
[
32
],
fpscr
;
}
powerpc_regs
;
struct
{
double
fpr
[
32
],
fpscr
;
}
powerpc_regs
;
}
fp
;
}
fp
;
union
union
...
@@ -5563,6 +5558,6 @@ union generic_reply
...
@@ -5563,6 +5558,6 @@ union generic_reply
struct
set_cursor_reply
set_cursor_reply
;
struct
set_cursor_reply
set_cursor_reply
;
};
};
#define SERVER_PROTOCOL_VERSION 42
0
#define SERVER_PROTOCOL_VERSION 42
1
#endif
/* __WINE_WINE_SERVER_PROTOCOL_H */
#endif
/* __WINE_WINE_SERVER_PROTOCOL_H */
server/protocol.def
View file @
417e926a
...
@@ -145,7 +145,7 @@ typedef union
...
@@ -145,7 +145,7 @@ typedef union
/* supported CPU types */
/* supported CPU types */
enum cpu_type
enum cpu_type
{
{
CPU_x86, CPU_x86_64, CPU_
ALPHA, CPU_
POWERPC, CPU_ARM, CPU_SPARC
CPU_x86, CPU_x86_64, CPU_POWERPC, CPU_ARM, CPU_SPARC
};
};
typedef int cpu_type_t;
typedef int cpu_type_t;
...
@@ -159,8 +159,6 @@ typedef struct
...
@@ -159,8 +159,6 @@ typedef struct
struct { unsigned int eip, ebp, esp, eflags, cs, ss; } i386_regs;
struct { unsigned int eip, ebp, esp, eflags, cs, ss; } i386_regs;
struct { unsigned __int64 rip, rbp, rsp;
struct { unsigned __int64 rip, rbp, rsp;
unsigned int cs, ss, flags, __pad; } x86_64_regs;
unsigned int cs, ss, flags, __pad; } x86_64_regs;
struct { unsigned __int64 fir;
unsigned int psr, __pad; } alpha_regs;
struct { unsigned int iar, msr, ctr, lr, dar, dsisr, trap, __pad; } powerpc_regs;
struct { unsigned int iar, msr, ctr, lr, dar, dsisr, trap, __pad; } powerpc_regs;
struct { unsigned int sp, lr, pc, cpsr; } arm_regs;
struct { unsigned int sp, lr, pc, cpsr; } arm_regs;
struct { unsigned int psr, pc, npc, y, wim, tbr; } sparc_regs;
struct { unsigned int psr, pc, npc, y, wim, tbr; } sparc_regs;
...
@@ -170,8 +168,6 @@ typedef struct
...
@@ -170,8 +168,6 @@ typedef struct
struct { unsigned int eax, ebx, ecx, edx, esi, edi; } i386_regs;
struct { unsigned int eax, ebx, ecx, edx, esi, edi; } i386_regs;
struct { unsigned __int64 rax,rbx, rcx, rdx, rsi, rdi,
struct { unsigned __int64 rax,rbx, rcx, rdx, rsi, rdi,
r8, r9, r10, r11, r12, r13, r14, r15; } x86_64_regs;
r8, r9, r10, r11, r12, r13, r14, r15; } x86_64_regs;
struct { unsigned __int64 v0, t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12,
s0, s1, s2, s3, s4, s5, s6, a0, a1, a2, a3, a4, a5, at; } alpha_regs;
struct { unsigned int gpr[32], cr, xer; } powerpc_regs;
struct { unsigned int gpr[32], cr, xer; } powerpc_regs;
struct { unsigned int r[13]; } arm_regs;
struct { unsigned int r[13]; } arm_regs;
struct { unsigned int g[8], o[8], l[8], i[8]; } sparc_regs;
struct { unsigned int g[8], o[8], l[8], i[8]; } sparc_regs;
...
@@ -186,7 +182,6 @@ typedef struct
...
@@ -186,7 +182,6 @@ typedef struct
struct { unsigned int ctrl, status, tag, err_off, err_sel, data_off, data_sel, cr0npx;
struct { unsigned int ctrl, status, tag, err_off, err_sel, data_off, data_sel, cr0npx;
unsigned char regs[80]; } i386_regs;
unsigned char regs[80]; } i386_regs;
struct { struct { unsigned __int64 low, high; } fpregs[32]; } x86_64_regs;
struct { struct { unsigned __int64 low, high; } fpregs[32]; } x86_64_regs;
struct { unsigned __int64 f[32], fpcr, softfpcr; } alpha_regs;
struct { double fpr[32], fpscr; } powerpc_regs;
struct { double fpr[32], fpscr; } powerpc_regs;
} fp; /* selected by SERVER_CTX_FLOATING_POINT */
} fp; /* selected by SERVER_CTX_FLOATING_POINT */
union
union
...
...
server/thread.c
View file @
417e926a
...
@@ -57,8 +57,6 @@
...
@@ -57,8 +57,6 @@
static
const
unsigned
int
supported_cpus
=
CPU_FLAG
(
CPU_x86
);
static
const
unsigned
int
supported_cpus
=
CPU_FLAG
(
CPU_x86
);
#elif defined(__x86_64__)
#elif defined(__x86_64__)
static
const
unsigned
int
supported_cpus
=
CPU_FLAG
(
CPU_x86_64
)
|
CPU_FLAG
(
CPU_x86
);
static
const
unsigned
int
supported_cpus
=
CPU_FLAG
(
CPU_x86_64
)
|
CPU_FLAG
(
CPU_x86
);
#elif defined(__ALPHA__)
static
const
unsigned
int
supported_cpus
=
CPU_FLAG
(
CPU_ALPHA
);
#elif defined(__powerpc__)
#elif defined(__powerpc__)
static
const
unsigned
int
supported_cpus
=
CPU_FLAG
(
CPU_POWERPC
);
static
const
unsigned
int
supported_cpus
=
CPU_FLAG
(
CPU_POWERPC
);
#elif defined(__sparc__)
#elif defined(__sparc__)
...
@@ -1017,7 +1015,6 @@ static unsigned int get_context_system_regs( enum cpu_type cpu )
...
@@ -1017,7 +1015,6 @@ static unsigned int get_context_system_regs( enum cpu_type cpu )
{
{
case
CPU_x86
:
return
SERVER_CTX_DEBUG_REGISTERS
;
case
CPU_x86
:
return
SERVER_CTX_DEBUG_REGISTERS
;
case
CPU_x86_64
:
return
SERVER_CTX_DEBUG_REGISTERS
;
case
CPU_x86_64
:
return
SERVER_CTX_DEBUG_REGISTERS
;
case
CPU_ALPHA
:
return
0
;
case
CPU_POWERPC
:
return
0
;
case
CPU_POWERPC
:
return
0
;
case
CPU_ARM
:
return
0
;
case
CPU_ARM
:
return
0
;
case
CPU_SPARC
:
return
0
;
case
CPU_SPARC
:
return
0
;
...
@@ -1044,9 +1041,6 @@ void break_thread( struct thread *thread )
...
@@ -1044,9 +1041,6 @@ void break_thread( struct thread *thread )
case
CPU_x86_64
:
case
CPU_x86_64
:
data
.
exception
.
address
=
thread
->
context
->
ctl
.
x86_64_regs
.
rip
;
data
.
exception
.
address
=
thread
->
context
->
ctl
.
x86_64_regs
.
rip
;
break
;
break
;
case
CPU_ALPHA
:
data
.
exception
.
address
=
thread
->
context
->
ctl
.
alpha_regs
.
fir
;
break
;
case
CPU_POWERPC
:
case
CPU_POWERPC
:
data
.
exception
.
address
=
thread
->
context
->
ctl
.
powerpc_regs
.
iar
;
data
.
exception
.
address
=
thread
->
context
->
ctl
.
powerpc_regs
.
iar
;
break
;
break
;
...
...
server/trace.c
View file @
417e926a
...
@@ -113,7 +113,6 @@ static void dump_cpu_type( const char *prefix, const cpu_type_t *code )
...
@@ -113,7 +113,6 @@ static void dump_cpu_type( const char *prefix, const cpu_type_t *code )
#define CASE(c) case CPU_##c: fprintf( stderr, "%s%s", prefix, #c ); break
#define CASE(c) case CPU_##c: fprintf( stderr, "%s%s", prefix, #c ); break
CASE
(
x86
);
CASE
(
x86
);
CASE
(
x86_64
);
CASE
(
x86_64
);
CASE
(
ALPHA
);
CASE
(
POWERPC
);
CASE
(
POWERPC
);
CASE
(
SPARC
);
CASE
(
SPARC
);
default:
fprintf
(
stderr
,
"%s%u"
,
prefix
,
*
code
);
break
;
default:
fprintf
(
stderr
,
"%s%u"
,
prefix
,
*
code
);
break
;
...
@@ -530,54 +529,6 @@ static void dump_varargs_context( const char *prefix, data_size_t size )
...
@@ -530,54 +529,6 @@ static void dump_varargs_context( const char *prefix, data_size_t size )
(
unsigned
int
)
ctx
.
fp
.
x86_64_regs
.
fpregs
[
i
].
low
);
(
unsigned
int
)
ctx
.
fp
.
x86_64_regs
.
fpregs
[
i
].
low
);
}
}
break
;
break
;
case
CPU_ALPHA
:
if
(
ctx
.
flags
&
SERVER_CTX_CONTROL
)
{
dump_uint64
(
",fir="
,
&
ctx
.
ctl
.
alpha_regs
.
fir
);
fprintf
(
stderr
,
",psr=%08x"
,
ctx
.
ctl
.
alpha_regs
.
psr
);
}
if
(
ctx
.
flags
&
SERVER_CTX_INTEGER
)
{
dump_uint64
(
",v0="
,
&
ctx
.
integer
.
alpha_regs
.
v0
);
dump_uint64
(
",t0="
,
&
ctx
.
integer
.
alpha_regs
.
t0
);
dump_uint64
(
",t1="
,
&
ctx
.
integer
.
alpha_regs
.
t1
);
dump_uint64
(
",t2="
,
&
ctx
.
integer
.
alpha_regs
.
t2
);
dump_uint64
(
",t3="
,
&
ctx
.
integer
.
alpha_regs
.
t3
);
dump_uint64
(
",t4="
,
&
ctx
.
integer
.
alpha_regs
.
t4
);
dump_uint64
(
",t5="
,
&
ctx
.
integer
.
alpha_regs
.
t5
);
dump_uint64
(
",t6="
,
&
ctx
.
integer
.
alpha_regs
.
t6
);
dump_uint64
(
",t7="
,
&
ctx
.
integer
.
alpha_regs
.
t7
);
dump_uint64
(
",t8="
,
&
ctx
.
integer
.
alpha_regs
.
t8
);
dump_uint64
(
",t9="
,
&
ctx
.
integer
.
alpha_regs
.
t9
);
dump_uint64
(
",t10="
,
&
ctx
.
integer
.
alpha_regs
.
t10
);
dump_uint64
(
",t11="
,
&
ctx
.
integer
.
alpha_regs
.
t11
);
dump_uint64
(
",t12="
,
&
ctx
.
integer
.
alpha_regs
.
t12
);
dump_uint64
(
",s0="
,
&
ctx
.
integer
.
alpha_regs
.
s0
);
dump_uint64
(
",s1="
,
&
ctx
.
integer
.
alpha_regs
.
s1
);
dump_uint64
(
",s2="
,
&
ctx
.
integer
.
alpha_regs
.
s2
);
dump_uint64
(
",s3="
,
&
ctx
.
integer
.
alpha_regs
.
s3
);
dump_uint64
(
",s4="
,
&
ctx
.
integer
.
alpha_regs
.
s4
);
dump_uint64
(
",s5="
,
&
ctx
.
integer
.
alpha_regs
.
s5
);
dump_uint64
(
",s6="
,
&
ctx
.
integer
.
alpha_regs
.
s6
);
dump_uint64
(
",a0="
,
&
ctx
.
integer
.
alpha_regs
.
a0
);
dump_uint64
(
",a1="
,
&
ctx
.
integer
.
alpha_regs
.
a1
);
dump_uint64
(
",a2="
,
&
ctx
.
integer
.
alpha_regs
.
a2
);
dump_uint64
(
",a3="
,
&
ctx
.
integer
.
alpha_regs
.
a3
);
dump_uint64
(
",a4="
,
&
ctx
.
integer
.
alpha_regs
.
a4
);
dump_uint64
(
",a5="
,
&
ctx
.
integer
.
alpha_regs
.
a5
);
dump_uint64
(
",at="
,
&
ctx
.
integer
.
alpha_regs
.
at
);
}
if
(
ctx
.
flags
&
SERVER_CTX_FLOATING_POINT
)
{
for
(
i
=
0
;
i
<
32
;
i
++
)
{
fprintf
(
stderr
,
",f%u"
,
i
);
dump_uint64
(
"="
,
&
ctx
.
fp
.
alpha_regs
.
f
[
i
]
);
}
dump_uint64
(
",fpcr="
,
&
ctx
.
fp
.
alpha_regs
.
fpcr
);
dump_uint64
(
",softfpcr="
,
&
ctx
.
fp
.
alpha_regs
.
softfpcr
);
}
break
;
case
CPU_POWERPC
:
case
CPU_POWERPC
:
if
(
ctx
.
flags
&
SERVER_CTX_CONTROL
)
if
(
ctx
.
flags
&
SERVER_CTX_CONTROL
)
fprintf
(
stderr
,
",iar=%08x,msr=%08x,ctr=%08x,lr=%08x,dar=%08x,dsisr=%08x,trap=%08x"
,
fprintf
(
stderr
,
",iar=%08x,msr=%08x,ctr=%08x,lr=%08x,dar=%08x,dsisr=%08x,trap=%08x"
,
...
...
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