Commit bd1f7ef1 authored by André Hentschel's avatar André Hentschel Committed by Alexandre Julliard

include: Rename 64-bit PState to 32-bit Cpsr on ARM64.

parent cdefae9e
...@@ -166,7 +166,7 @@ static void* arm64_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* siz ...@@ -166,7 +166,7 @@ static void* arm64_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* siz
#ifdef __aarch64__ #ifdef __aarch64__
switch (regno) switch (regno)
{ {
case CV_ARM64_PSTATE: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
case CV_ARM64_X0 + 0: *size = sizeof(ctx->X0); return &ctx->X0; case CV_ARM64_X0 + 0: *size = sizeof(ctx->X0); return &ctx->X0;
case CV_ARM64_X0 + 1: *size = sizeof(ctx->X1); return &ctx->X1; case CV_ARM64_X0 + 1: *size = sizeof(ctx->X1); return &ctx->X1;
case CV_ARM64_X0 + 2: *size = sizeof(ctx->X2); return &ctx->X2; case CV_ARM64_X0 + 2: *size = sizeof(ctx->X2); return &ctx->X2;
...@@ -201,7 +201,6 @@ static void* arm64_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* siz ...@@ -201,7 +201,6 @@ static void* arm64_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* siz
case CV_ARM64_LR: *size = sizeof(ctx->Lr); return &ctx->Lr; case CV_ARM64_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
case CV_ARM64_SP: *size = sizeof(ctx->Sp); return &ctx->Sp; case CV_ARM64_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
case CV_ARM64_PC: *size = sizeof(ctx->Pc); return &ctx->Pc; case CV_ARM64_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
case CV_ARM64_PSTATE: *size = sizeof(ctx->PState); return &ctx->PState;
} }
#endif #endif
FIXME("Unknown register %x\n", regno); FIXME("Unknown register %x\n", regno);
...@@ -212,6 +211,7 @@ static const char* arm64_fetch_regname(unsigned regno) ...@@ -212,6 +211,7 @@ static const char* arm64_fetch_regname(unsigned regno)
{ {
switch (regno) switch (regno)
{ {
case CV_ARM64_PSTATE: return "cpsr";
case CV_ARM64_X0 + 0: return "x0"; case CV_ARM64_X0 + 0: return "x0";
case CV_ARM64_X0 + 1: return "x1"; case CV_ARM64_X0 + 1: return "x1";
case CV_ARM64_X0 + 2: return "x2"; case CV_ARM64_X0 + 2: return "x2";
...@@ -246,7 +246,6 @@ static const char* arm64_fetch_regname(unsigned regno) ...@@ -246,7 +246,6 @@ static const char* arm64_fetch_regname(unsigned regno)
case CV_ARM64_LR: return "lr"; case CV_ARM64_LR: return "lr";
case CV_ARM64_SP: return "sp"; case CV_ARM64_SP: return "sp";
case CV_ARM64_PC: return "pc"; case CV_ARM64_PC: return "pc";
case CV_ARM64_PSTATE: return "cpsr";
} }
FIXME("Unknown register %x\n", regno); FIXME("Unknown register %x\n", regno);
return NULL; return NULL;
......
...@@ -129,7 +129,7 @@ static void save_context( CONTEXT *context, const ucontext_t *sigcontext ) ...@@ -129,7 +129,7 @@ static void save_context( CONTEXT *context, const ucontext_t *sigcontext )
context->Lr = LR_sig(sigcontext); /* Link register */ context->Lr = LR_sig(sigcontext); /* Link register */
context->Sp = SP_sig(sigcontext); /* Stack pointer */ context->Sp = SP_sig(sigcontext); /* Stack pointer */
context->Pc = PC_sig(sigcontext); /* Program Counter */ context->Pc = PC_sig(sigcontext); /* Program Counter */
context->PState = PSTATE_sig(sigcontext); /* Current State Register */ context->Cpsr = PSTATE_sig(sigcontext); /* Current State Register */
} }
...@@ -151,7 +151,7 @@ static void restore_context( const CONTEXT *context, ucontext_t *sigcontext ) ...@@ -151,7 +151,7 @@ static void restore_context( const CONTEXT *context, ucontext_t *sigcontext )
LR_sig(sigcontext) = context->Lr; /* Link register */ LR_sig(sigcontext) = context->Lr; /* Link register */
SP_sig(sigcontext) = context->Sp; /* Stack pointer */ SP_sig(sigcontext) = context->Sp; /* Stack pointer */
PC_sig(sigcontext) = context->Pc; /* Program Counter */ PC_sig(sigcontext) = context->Pc; /* Program Counter */
PSTATE_sig(sigcontext) = context->PState; /* Current State Register */ PSTATE_sig(sigcontext) = context->Cpsr; /* Current State Register */
} }
...@@ -209,7 +209,7 @@ void copy_context( CONTEXT *to, const CONTEXT *from, DWORD flags ) ...@@ -209,7 +209,7 @@ void copy_context( CONTEXT *to, const CONTEXT *from, DWORD flags )
to->Lr = from->Lr; to->Lr = from->Lr;
to->Sp = from->Sp; to->Sp = from->Sp;
to->Pc = from->Pc; to->Pc = from->Pc;
to->PState = from->PState; to->Cpsr = from->Cpsr;
} }
if (flags & CONTEXT_INTEGER) if (flags & CONTEXT_INTEGER)
{ {
...@@ -241,7 +241,7 @@ NTSTATUS context_to_server( context_t *to, const CONTEXT *from ) ...@@ -241,7 +241,7 @@ NTSTATUS context_to_server( context_t *to, const CONTEXT *from )
to->integer.arm64_regs.x[30] = from->Lr; to->integer.arm64_regs.x[30] = from->Lr;
to->ctl.arm64_regs.sp = from->Sp; to->ctl.arm64_regs.sp = from->Sp;
to->ctl.arm64_regs.pc = from->Pc; to->ctl.arm64_regs.pc = from->Pc;
to->ctl.arm64_regs.pstate = from->PState; to->ctl.arm64_regs.pstate = from->Cpsr;
} }
if (flags & CONTEXT_INTEGER) if (flags & CONTEXT_INTEGER)
{ {
...@@ -274,7 +274,7 @@ NTSTATUS context_from_server( CONTEXT *to, const context_t *from ) ...@@ -274,7 +274,7 @@ NTSTATUS context_from_server( CONTEXT *to, const context_t *from )
to->Lr = from->integer.arm64_regs.x[30]; to->Lr = from->integer.arm64_regs.x[30];
to->Sp = from->ctl.arm64_regs.sp; to->Sp = from->ctl.arm64_regs.sp;
to->Pc = from->ctl.arm64_regs.pc; to->Pc = from->ctl.arm64_regs.pc;
to->PState = from->ctl.arm64_regs.pstate; to->Cpsr = from->ctl.arm64_regs.pstate;
} }
if (from->flags & SERVER_CTX_INTEGER) if (from->flags & SERVER_CTX_INTEGER)
{ {
......
...@@ -1755,6 +1755,7 @@ PRUNTIME_FUNCTION WINAPI RtlLookupFunctionEntry(ULONG_PTR,DWORD*,UNWIND_HISTORY_ ...@@ -1755,6 +1755,7 @@ PRUNTIME_FUNCTION WINAPI RtlLookupFunctionEntry(ULONG_PTR,DWORD*,UNWIND_HISTORY_
typedef struct _CONTEXT { typedef struct _CONTEXT {
ULONG ContextFlags; ULONG ContextFlags;
ULONG Cpsr;
/* This section is specified/returned if the ContextFlags word contains /* This section is specified/returned if the ContextFlags word contains
the flag CONTEXT_INTEGER. */ the flag CONTEXT_INTEGER. */
...@@ -1793,7 +1794,6 @@ typedef struct _CONTEXT { ...@@ -1793,7 +1794,6 @@ typedef struct _CONTEXT {
ULONGLONG Lr; ULONGLONG Lr;
ULONGLONG Sp; ULONGLONG Sp;
ULONGLONG Pc; ULONGLONG Pc;
ULONGLONG PState;
/* These are selected by CONTEXT_FLOATING_POINT */ /* These are selected by CONTEXT_FLOATING_POINT */
/* FIXME */ /* FIXME */
......
...@@ -60,7 +60,7 @@ static void be_arm64_print_context(HANDLE hThread, const CONTEXT* ctx, int all_r ...@@ -60,7 +60,7 @@ static void be_arm64_print_context(HANDLE hThread, const CONTEXT* ctx, int all_r
int i; int i;
char buf[8]; char buf[8];
switch (ctx->PState & 0x0f) switch (ctx->Cpsr & 0x0f)
{ {
case 0: strcpy(buf, "EL0t"); break; case 0: strcpy(buf, "EL0t"); break;
case 4: strcpy(buf, "EL1t"); break; case 4: strcpy(buf, "EL1t"); break;
...@@ -73,15 +73,15 @@ static void be_arm64_print_context(HANDLE hThread, const CONTEXT* ctx, int all_r ...@@ -73,15 +73,15 @@ static void be_arm64_print_context(HANDLE hThread, const CONTEXT* ctx, int all_r
} }
dbg_printf("Register dump:\n"); dbg_printf("Register dump:\n");
dbg_printf("%s %s Mode\n", (ctx->PState & 0x10) ? "ARM" : "ARM64", buf); dbg_printf("%s %s Mode\n", (ctx->Cpsr & 0x10) ? "ARM" : "ARM64", buf);
strcpy(buf, condflags); strcpy(buf, condflags);
for (i = 0; buf[i]; i++) for (i = 0; buf[i]; i++)
if (!((ctx->PState >> 26) & (1 << (sizeof(condflags) - i)))) if (!((ctx->Cpsr >> 26) & (1 << (sizeof(condflags) - i))))
buf[i] = '-'; buf[i] = '-';
dbg_printf(" Pc:%016lx Sp:%016lx Lr:%016lx Pstate:%016lx(%s)\n", dbg_printf(" Pc:%016lx Sp:%016lx Lr:%016lx Cpsr:%08x(%s)\n",
ctx->Pc, ctx->Sp, ctx->Lr, ctx->PState, buf); ctx->Pc, ctx->Sp, ctx->Lr, ctx->Cpsr, buf);
dbg_printf(" x0: %016lx x1: %016lx x2: %016lx x3: %016lx x4: %016lx\n", dbg_printf(" x0: %016lx x1: %016lx x2: %016lx x3: %016lx x4: %016lx\n",
ctx->X0, ctx->X1, ctx->X2, ctx->X3, ctx->X4); ctx->X0, ctx->X1, ctx->X2, ctx->X3, ctx->X4);
dbg_printf(" x5: %016lx x6: %016lx x7: %016lx x8: %016lx x9: %016lx\n", dbg_printf(" x5: %016lx x6: %016lx x7: %016lx x8: %016lx x9: %016lx\n",
...@@ -104,6 +104,7 @@ static void be_arm64_print_segment_info(HANDLE hThread, const CONTEXT* ctx) ...@@ -104,6 +104,7 @@ static void be_arm64_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
static struct dbg_internal_var be_arm64_ctx[] = static struct dbg_internal_var be_arm64_ctx[] =
{ {
{CV_ARM64_PSTATE, "cpsr", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Cpsr), dbg_itype_unsigned_int},
{CV_ARM64_X0 + 0, "x0", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X0), dbg_itype_unsigned_long_int}, {CV_ARM64_X0 + 0, "x0", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X0), dbg_itype_unsigned_long_int},
{CV_ARM64_X0 + 1, "x1", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X1), dbg_itype_unsigned_long_int}, {CV_ARM64_X0 + 1, "x1", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X1), dbg_itype_unsigned_long_int},
{CV_ARM64_X0 + 2, "x2", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X2), dbg_itype_unsigned_long_int}, {CV_ARM64_X0 + 2, "x2", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X2), dbg_itype_unsigned_long_int},
...@@ -137,7 +138,6 @@ static struct dbg_internal_var be_arm64_ctx[] = ...@@ -137,7 +138,6 @@ static struct dbg_internal_var be_arm64_ctx[] =
{CV_ARM64_LR, "lr", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Lr), dbg_itype_unsigned_long_int}, {CV_ARM64_LR, "lr", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Lr), dbg_itype_unsigned_long_int},
{CV_ARM64_SP, "sp", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Sp), dbg_itype_unsigned_long_int}, {CV_ARM64_SP, "sp", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Sp), dbg_itype_unsigned_long_int},
{CV_ARM64_PC, "pc", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Pc), dbg_itype_unsigned_long_int}, {CV_ARM64_PC, "pc", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Pc), dbg_itype_unsigned_long_int},
{CV_ARM64_PSTATE, "pstate", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, PState), dbg_itype_unsigned_long_int},
{0, NULL, 0, dbg_itype_none} {0, NULL, 0, dbg_itype_none}
}; };
......
...@@ -399,6 +399,7 @@ static struct cpu_register cpu_register_map[] = { ...@@ -399,6 +399,7 @@ static struct cpu_register cpu_register_map[] = {
#elif defined(__aarch64__) #elif defined(__aarch64__)
static const char target_xml[] = ""; static const char target_xml[] = "";
static struct cpu_register cpu_register_map[] = { static struct cpu_register cpu_register_map[] = {
REG(Cpsr, 4, CONTEXT_CONTROL),
REG(X0, 8, CONTEXT_INTEGER), REG(X0, 8, CONTEXT_INTEGER),
REG(X1, 8, CONTEXT_INTEGER), REG(X1, 8, CONTEXT_INTEGER),
REG(X2, 8, CONTEXT_INTEGER), REG(X2, 8, CONTEXT_INTEGER),
...@@ -432,7 +433,6 @@ static struct cpu_register cpu_register_map[] = { ...@@ -432,7 +433,6 @@ static struct cpu_register cpu_register_map[] = {
REG(Lr, 8, CONTEXT_INTEGER), REG(Lr, 8, CONTEXT_INTEGER),
REG(Sp, 8, CONTEXT_CONTROL), REG(Sp, 8, CONTEXT_CONTROL),
REG(Pc, 8, CONTEXT_CONTROL), REG(Pc, 8, CONTEXT_CONTROL),
REG(PState, 8, CONTEXT_CONTROL),
}; };
#else #else
# error Define the registers map for your CPU # error Define the registers map for your CPU
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment