Skip to content
Projects
Groups
Snippets
Help
This project
Loading...
Sign in / Register
Toggle navigation
W
wine-winehq
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Registry
Registry
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
wine
wine-winehq
Commits
b67dc2f4
Commit
b67dc2f4
authored
Dec 08, 2017
by
Alexandre Julliard
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
oleaut32: Fix ARM floating point register allocations.
Signed-off-by:
Alexandre Julliard
<
julliard@winehq.org
>
parent
46aedd2b
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
6 additions
and
6 deletions
+6
-6
typelib.c
dlls/oleaut32/typelib.c
+6
-6
No files found.
dlls/oleaut32/typelib.c
View file @
b67dc2f4
...
...
@@ -6867,7 +6867,8 @@ DispCallFunc(
}
regs
;
int
rcount
;
/* 32-bit register index count */
#ifndef __SOFTFP__
int
scount
=
0
;
/* single-precision float register index count (will be incremented twice for doubles, plus alignment) */
int
scount
=
0
;
/* single-precision float register index count */
int
dcount
=
0
;
/* double-precision float register index count */
#endif
TRACE
(
"(%p, %ld, %d, %d, %d, %p, %p, %p (vt=%d))
\n
"
,
...
...
@@ -6921,15 +6922,13 @@ DispCallFunc(
case
VT_R8
:
/* these must be 8-byte aligned, and put in 'd' regs or stack, as they are double-floats */
case
VT_DATE
:
#ifndef __SOFTFP__
if
(
scount
<
15
)
dcount
=
max
(
(
scount
+
1
)
/
2
,
dcount
);
if
(
dcount
<
8
)
{
scount
+=
(
scount
%
2
);
/* align scount to next whole double */
regs
.
sd
.
d
[
scount
/
2
]
=
V_R8
(
arg
);
scount
+=
2
;
regs
.
sd
.
d
[
dcount
++
]
=
V_R8
(
arg
);
}
else
{
scount
=
16
;
/* Make sure we flag that all 's' regs are full */
argspos
+=
(
argspos
%
2
);
/* align argspos to 8-bytes */
memcpy
(
&
args
[
argspos
],
&
V_R8
(
arg
),
sizeof
(
V_R8
(
arg
))
);
argspos
+=
sizeof
(
V_R8
(
arg
))
/
sizeof
(
DWORD
);
...
...
@@ -6981,6 +6980,7 @@ DispCallFunc(
break
;
case
VT_R4
:
/* these must be 4-byte aligned, and put in 's' regs or stack, as they are single-floats */
#ifndef __SOFTFP__
if
(
!
(
scount
%
2
))
scount
=
max
(
scount
,
dcount
*
2
);
if
(
scount
<
16
)
regs
.
sd
.
s
[
scount
++
]
=
V_R4
(
arg
);
else
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment